This invention relates to phase-locked loops. More particularly, this invention relates to a method and apparatus for testing a phase-locked loop, and to circuitry for facilitating such testing.
The use of phase-locked loops for generating clock and frequency standards is well known. At its most basic, a phase-locked loop (xe2x80x9cPLLxe2x80x9d) includes, in series, a phase-frequency detector having a first input to which a reference frequency is applied, a charge pump, a loop filter and a voltage-controlled oscillator (xe2x80x9cVCOxe2x80x9d). The output of the VCO, which is the output of the PLL, is fed back to a second input of the phase-frequency detector. Any phase variance between the reference signal and the feedback signal causes the phase-frequency detector to generate a voltage which is input to the charge pump and loop filter, which output a control voltage to the voltage-controlled oscillator. The PLL output signal keeps changing as the control voltage changes until there is a match between the frequencies of the output and the reference signal, which is detected by the phase-frequency detector. At that point, the PLL is considered to be locked.
Known methods for testing a PLL test whether or not the PLL is capable of locking on a reference signal. However, even if the PLL locks, it may nevertheless be subject to drift if there is excessive leakage current in, e.g., the charge pump or the loop filter, resulting in a phase variance between the input signal and the output signal. It would be desirable to be able to provide a method for testing a PLL that would be capable of detecting such leakage currents or their effects, apparatus for performing such a test and a PLL adapted for such a test.
It is an advantage of the present invention that it provides a method for testing a PLL that would be capable of detecting such leakage currents or their effects, apparatus for performing such a test and a PLL adapted for such a test.
In accordance with the present invention, there is provided a method of testing a phase-locked loop. The method includes inputting a reference signal to the phase-locked loop, allowing the phase-locked loop to lock onto the reference signal, discontinuing feeding back of the loop output, and monitoring the loop output, after the discontinuing, for a change in the output frequency. Apparatus for performing such a test, and a phase-locked loop adapted to be so tested, are also provided.